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<p align="left" class="western" lang="zxx" style="line-height: 150%; widows: 2; orphans: 2">
	<span style="font-family:arial,helvetica,sans-serif;"><strong><span style="font-size: 16px;"><span lang="en-US"><span style="text-decoration: none;">International Journals:</span></span></span></strong></span></p>
<ul>
	<li class="western" lang="zxx" style="line-height: 150%; text-align: justify;">
		<p>
			<span style="font-family:arial,helvetica,sans-serif;"><span style="font-size: 14px;"><span lang="en-US"><span style="text-decoration: none;">Built In Generation of Functional BroadSide Tests using a Fixed hardware System---IIST---ISBN-978-93-81693-98-8</span></span></span></span></p>
	</li>
</ul>
<ul>
	<li class="western" lang="zxx" style="line-height: 150%; text-align: justify;">
		<p>
			<span style="font-family:arial,helvetica,sans-serif;"><span style="font-size: 14px;"><span lang="en-US"><span style="text-decoration: none;">Area Optimization Re-Configurable FPGA using low latency &ndash;---IIST;2189-3128</span></span></span></span></p>
	</li>
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